december 2009 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch features ? over-voltage tolerance (ovt) on all usb ports up to 5.25v without external components ? low on capacitance: 3.7pf typical ? low on resistance: 3.9 ? typical ? low power consumption: 1 a maximum - 20 a maximum i cct over an expanded voltage range (v in =1.8v, v cc =4.3v) ? wide -3db bandwidth: > 720mhz ? packaged in 10-lead micropak? (1.6 x 2.1mm) ? 8kv esd rating, >16kv power/gnd esd rating ? power-off protection on all ports when v cc =0v - d+/d- pins tolerate up to 5.25v applications ? cell phone, pda, digital camera, and notebook ? lcd monitor, tv, and set-top box important note: for additional performance info rmation, please contact analogswitch@fairchildsemi.com . description the FSUSB43 is a bi-directional, low-power, two-port, high-speed, usb2.0 switch. configured as a double- pole, double-throw (dpdt) switch, it is optimized for switching between two high-speed (480mbps) sources or a high-speed and full-speed (12mbps) source. the FSUSB43 is compatible with the requirements of usb2.0 and features an extremely low on capacitance (c on ) of 3.7pf. the wide bandwidth of this device (720mhz) exceeds the bandwidth needed to pass the third harmonic, resulting in signals with minimum edge and phase distortion. superior channel-to-channel crosstalk also minimizes interference. the FSUSB43 contains special circuitry on the switch i/o pins for applications where the v cc supply is powered-off (v cc =0), which allows the device to withstand an over-voltage condition. this minimizes current consumption even when the control voltage applied to the sel pin is lower than the supply voltage (v cc ). this feature is especially valuable to mobile applications, such as cell phones, allowing for direct interface with the general-purpose i/os of the baseband processor. other applications include switching and connector sharing in portable cell phones, pdas, digital cameras, printers, and notebook computers. hsd1+ hsd2+ hsd1- hsd2- d- d+ control sel /oe figure 1. analog symbol ordering information part number top mark operating temperature range eco status package FSUSB43l10x jh -40 to +85c green 10-lead micropak? 1.6 x 2.1mm, jedec mo-255b micropak? is a trademark of fairchild semiconductor corporation. for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 2 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch pin configuration figure 2. pin assignment (top through view) pin definitions pin # name description 1 hsd1+ multiplexed source inputs 2 hsd1- multiplexed source inputs 3 hsd2+ multiplexed source inputs 4 hsd2- multiplexed source inputs 5 gnd ground 6 /oe switch enable 7 d- usb data bus 8 d+ usb data bus 9 sel switch select 10 v cc supply voltage truth table sel /oe function x high disconnect low low d+, d-=hsd1+, hsd1- high low d+, d-=hsd2+, hsd2- v cc gnd 1 10 9 8 7 6 5 4 3 2 hsd1+ hsd1- hsd2+ hsd2- d+ d- /oe sel
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 3 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage -0.5 +5.5 v v cntrl dc input voltage (sel, /oe) (1) -0.5 v cc v v sw all pins for v cc 0 to 5.5v -0.5 5.5 v i ik dc input diode current -50 ma i out dc output current 100 ma t stg storage temperature -65 +150 c esd human body model: jedec jesd22-a114 all pins 8 kv i/o to gnd 9 power to gnd 16 charged device model: jedec jesd22-c101 2 note: 1. the input and output negative ratings may be exceeded if t he input and output diode current ratings are observed. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v cc supply voltage 3.0 4.3 v v cntrl control input voltage (2) (sel, /oe) 0 v cc v v sw switch i/o voltage -0.5 4.5 v t a operating temperature -40 +85 c note: 2. the control input must be held high or low; it must not float.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 4 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch dc electrical characteristics all typical values are at 25c unless otherwise specified. symbol parameter conditions v cc (v) t a =- 40oc to +85oc units min. typ. max. v ik clamp diode voltage i in =-18ma 3.0 -1.2 v v ih input voltage high 3.0 to 3.6 1.3 v 4.3 1.7 v v il input voltage low 3.0 to 3.6 0.5 v 4.3 0.7 v i in control input leakage v sw =0 to v cc 4.3 -1.0 1.0 a i oz off state leakage 0 dn, hsd1n, hsd2n 3.6v 4.3 -2.0 2.0 a i off power-off leakage current (all i/o ports) v sw =0v to 4.3v, v cc =0v figure 4 0 -2 2 a r on hs switch on resistance (3) v sw =0.4v, i on =-8ma figure 3 3.0 3.9 6.5 ? r on hs delta r on (4) v sw =0.4v, i on =-8ma 3.0 0.65 i q quiescent supply current v cntrl =0 or v cc , i out =0 4.3 1.0 a i cct increase in i q current per control voltage and v cc v cntrl =2.6v, v cc =4.3v 4.3 10.0 a v cntrl =1.8v, v cc =4.3v 4.3 20.0 a notes: 3. measured by the voltage drop between hsdn and dn pi ns at the indicated current through the switch. on resistance is determined by the lower of the voltage on the two (hsdn or dn ports). 4. guaranteed by characterization.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 5 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch ac electrical characteristics all typical values are for v cc =3.3v at 25c unless otherwise specified. symbol parameter conditions v cc (v) t a =- 40oc to +85oc units min. typ. max. t on turn-on time sel, /oe to output r l =50 ? , c l =5pf, v sw =0.8v figure 5, figure 6 3.0 to 3.6 13 30 ns t off turn-off time sel, /oe to output r l =50 ? , c l =5pf, v sw =0.8v figure 5, figure 6 3.0 to 3.6 12 25 ns t pd propagation delay (5) r l =50 ? , c l =5 pf figure 5, figure 7 3.3 0.25 ns t bbm break-before-make time (5) r l =50 ? , c l =5pf v sw1 =v sw2 =0.8v figure 9 3.0 to 3.6 2.0 6.5 ns oirr off isolation (5) r l =50 ? , f=240mhz figure 11 3.0 to 3.6 -30 db xtalk non-adjacent channel crosstalk (5) r l =50 ? , f=240mhz figure 12 3.0 to 3.6 -45 db bw -3db bandwidth (5) r l =50 ? , c l =0pf figure 10 3.0 to 3.6 720 mhz r l =50 ? , c l =5pf figure 10 550 mhz note: 5. guaranteed by characterization. usb high-speed-related ac electrical characteristics symbol parameter conditions v cc (v) t a =- 40oc to +85oc units min. typ. max. t sk(p) skew of opposite transitions of the same output (6) r l =50 ? , c l =5pf figure 8 3.0 to 3.6 20 ps t j total jitter (6) r l =50 ? , c l =5pf, t r =t f =500ps (10-90%) at 480mbps, (prbs=2 15 ? 1) 3.0 to 3.6 200 ps note: 6. guaranteed by characterization. capacitance symbol parameter conditions t a =- 40oc to +85oc units min. typ. max. c in control pin input capacitance (7) v cc =0v 1.5 pf c on d+/d- on capacitance (7) v cc =3.3v, /oe=0v, f=240mhz figure 14 3.7 c off d1n, d2n off capacitance (7) v cc and /oe=3.3v figure 13 2.0 note: 7. guaranteed by characterization.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 6 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch test diagrams select hsd n dn v sel = 0 orv cc i on v on r on = v on /i on gnd v sw gnd sw select v sel = 0 orv cc nc a i dn(off) v sw gnd v v cc **each switch port is tested separately figure 3. on resistance figure 4. off leakage r l ,r s ,andc l are functions of the application environment (see ac tables for specific values) c l includes test fixture and stray capacitance. r l c l hsd n dn gnd gnd r s v sel v sw gnd v out v out t rise =2.5ns gnd v cc 90% 90% 10% 10% t fall = 2.5ns v cc /2 v cc /2 input ? v /oe ,v sel output- v out 90% v oh v ol t on t off 90% v ?v v ? figure 5. ac test circuit load figur e 6. turn-on / turn-off waveforms input output v oh v ol 50% 50% 50% 50% 400mv t phl t plh 0v t rise = 500ps -400mv 90% 90% 10% 10% t fall =500ps 0v output t phl +400mv t plh figure 7. propagation delay (t r t f ? 500ps) figure 8. intra-pair skew test t sk(p)
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 7 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch test diagrams (continued) v cc 0.9*v out v cc /2 t bbm 0v v out input - v sel 0.9*v out t rise = 2.5ns 90% 10% c l hsd n r l dn gnd gnd r s v sel v sw1 gnd v out v sw2 gnd - - r l ,r s ,andc l are functions of the application environment (see ac tables for specific values) c l includes test fixture and stray capacitance. figure 9. break-before-make interval timing v out gnd gnd r t gnd gnd v s r s network analyzer v sel gnd r s and r t are functions of the application environment (see ac tables for specific values). v in r s and r t are functions of the application environment (see ac tables for specific values). v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v sel gnd v in r t off isolation = 20 log (v out / v in ) figure 10. bandwidth figure 11. channel off isolation v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd r s and r t are functions of the application environment (see ac tables for specific values). v sel gnd nc v in crosstalk = 20 log (v out / v in ) figure 12. non-adjacent ch annel-to-channel crosstalk v sel = 0 or v cc hsd n capacitance meter s hsd n v sel = 0 or v cc hsd n capacitance meter s hsd n figure 13. channel off capacitance figure 14. channel on capacitance
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 8 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch physical dimensions bottom view top view recommended land pattern side view 2x 2x notes: a. package conforms to jedec registration mo-255, variation uabd . b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. presence of center pad is package supplier dependent. if present it is not intended to be soldered and has a black oxide finish. e. drawing filename: mkt-mac10arev5. 0.10 c 0.10 c 0.10 cab 0.05 c pin1 ident is 2x longer than other lines a b c 0.35 0.25 9x 9x 14 9 6 0.25 0.15 10 5 0.50 0.56 1.62 0.05 0.00 0.05 c 0.55 max 0.05 c 1.60 2.10 (0.35) (0.25) 0.50 10x 10x (0.11) 1.12 1.62 keepout zone, no traces or vias allowed (0.20) (0.15) 0.35 0.25 0.35 0.25 detail a detail a 2x scale 0.35 0.25 0.65 0.55 d all features (0.36) (0.29) 0.56 figure 15. 10-lead micropak? package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . for current tape and reel specifications, visit fairchild semiconductor?s online packaging area: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com FSUSB43 ? rev. 1.0.2 9 FSUSB43 ? low-power, two-port, high-speed, usb2.0 (480mbps) switch
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